PrettyGoodRISCV/E-Series
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Removed FetchStage_Cfg in lieu of IsaCfg.

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This commit is contained in:
John Terrell 2023-03-17 23:43:25 -07:00
parent a055ae08e9
commit b236439fbd
Signed by untrusted user who does not match committer: johnt
GPG Key ID: 2E424258DD3731F4
2 changed files with 13 additions and 8 deletions
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5
src/Cpu/FetchStage.bsv
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@ -10,15 +10,12 @@ import FIFOF::*;
import GetPut::*; import GetPut::*;
import Memory::*; import Memory::*;
typedef struct {
} FetchStage_Cfg#(numeric type xlen);
interface FetchStage_Ifc#(numeric type xlen); interface FetchStage_Ifc#(numeric type xlen);
method ActionValue#(IF_ID#(xlen)) step(PC_IF#(xlen) pc_if); method ActionValue#(IF_ID#(xlen)) step(PC_IF#(xlen) pc_if);
interface ReadOnlyMemoryClient#(xlen, 32) memoryClient; interface ReadOnlyMemoryClient#(xlen, 32) memoryClient;
endinterface endinterface
module mkFetchStage#(FetchStage_Cfg#(xlen) cfg)(FetchStage_Ifc#(xlen)); module mkFetchStage#(IsaCfg#(xlen) cfg)(FetchStage_Ifc#(xlen));
Reg#(Bool) stall <- mkReg(False); Reg#(Bool) stall <- mkReg(False);
Reg#(Bool) externalStall <- mkReg(False); Reg#(Bool) externalStall <- mkReg(False);

16
src/Cpu/FetchStage_tb.bsv
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@ -15,16 +15,24 @@ module mkTopModule(Empty);
Reg#(Bit#(20)) testNumber <- mkReg(0); Reg#(Bit#(20)) testNumber <- mkReg(0);
// 32 bit // 32 bit
FetchStage_Cfg#(32) fetchStageConfig32 = FetchStage_Cfg{}; IsaCfg#(32) rv32 = IsaCfg{
FetchStage_Ifc#(32) fetchStage32 <- mkFetchStage(fetchStageConfig32); extN: False,
extS: False,
extU: False
};
FetchStage_Ifc#(32) fetchStage32 <- mkFetchStage(rv32);
FIFOF#(ReadOnlyMemoryRequest#(32)) memoryRequests32 <- mkUGFIFOF1(); FIFOF#(ReadOnlyMemoryRequest#(32)) memoryRequests32 <- mkUGFIFOF1();
mkConnection(fetchStage32.memoryClient.request, toPut(asIfc(memoryRequests32))); mkConnection(fetchStage32.memoryClient.request, toPut(asIfc(memoryRequests32)));
// 64 bit // 64 bit
FetchStage_Cfg#(64) fetchStageConfig64 = FetchStage_Cfg{}; IsaCfg#(64) rv64 = IsaCfg{
FetchStage_Ifc#(64) fetchStage64 <- mkFetchStage(fetchStageConfig64); extN: False,
extS: False,
extU: False
};
FetchStage_Ifc#(64) fetchStage64 <- mkFetchStage(rv64);
(* no_implicit_conditions *) (* no_implicit_conditions *)
rule test; rule test;