More FetchStage tests.

src/Cpu/FetchStage_tb.bsv

@@ -65,7 +65,7 @@ module mkTopModule(Empty);
                 pc_if.pc = 'h100;
                 pc_if.isBubble = False;
 
-                // The fetch return a bubble while the memory request is in flight
+                // Ensure the fetch returns a bubble while the memory request is in flight
                 let if_id <- fetchStage32.step(pc_if);
                 dynamicAssert(if_id == defaultValue, "Fetch - Memory request denied trap check - request should return a bubble while fetch is in flight");
 
@@ -94,6 +94,49 @@ module mkTopModule(Empty);
                 dynamicAssert(if_id.common.trap.Valid.cause == exception_INSTRUCTION_ACCESS_FAULT, "Memory request denied trap check - cause is access fault");
             end
 
+            // Normal memory request (request submit)
+            5: begin
+                pc_if.pc = 'h100;
+                pc_if.isBubble = False;
+
+                // The fetch should proceed and return a bubble.
+                let if_id <- fetchStage32.step(pc_if);
+                dynamicAssert(if_id == defaultValue, "Fetch - Normal request - request should return a bubble");
+            end
+
+            // Normal memory request (request receipt)
+            6: begin
+                pc_if.pc = 'h100;
+                pc_if.isBubble = False;
+
+                // Ensure the fetch returns a bubble while the memory request is in flight
+                let if_id <- fetchStage32.step(pc_if);
+                dynamicAssert(if_id == defaultValue, "Fetch - Normal request - request should return a bubble while fetch is in flight");
+
+                dynamicAssert(memoryRequests32.notEmpty, "Fetch - Normal request - memory request queue should not be empty");
+                let memoryRequest = memoryRequests32.first;
+                memoryRequests32.deq;
+
+                dynamicAssert(memoryRequest.address == 'h100, "Fetch - Normal request - memory request should have correct address");
+                fetchStage32.memoryClient.response.put(ReadOnlyMemoryResponse {
+                    data: 'haabb_ccdd,
+                    accessFault: False
+                });
+            end
+
+            // Normal memory request (return value check)
+            7: begin
+                pc_if.pc = 'h100;
+                pc_if.isBubble = False;
+
+                // The fetch should proceed and return a bubble.
+                let if_id <- fetchStage32.step(pc_if);
+                dynamicAssert(if_id.common.pc == pc_if.pc, "Fetch - Normal request - common.pc");
+                dynamicAssert(!if_id.common.isBubble, "Fetch - Normal request - common.isBubble");
+                dynamicAssert(!isValid(if_id.common.trap), "Fetch - Normal request - contains no trap");
+                dynamicAssert(if_id.common.ir.value == 'haabb_ccdd, "Fetch - Normal request - contains expected instruction data");
+            end
+
             default: begin
                 $display(">>>PASS");
                 $finish();